1) Field of the Invention
The present invention relates to a technique for measuring power source noise generated inside an integrated circuit [for example, LSI (Large Scale Integration)].
2) Description of the Related Art
There is a previous technique for measuring power source noise generated inside an integrated circuit (for example, LSI). In the technique, a probe is used to directly monitor, from outside, power source noise of a silicon chip in a LSI package (see, for example, the following patent document 1).
That is, in the previous art, a probe needle is directly made into contact with power wiring inside an LSI to measure power source noise.
However, like the following-mentioned patent document 1, in which a probe needle is directly made into contact with an internal circuit to measure power source noise, an impedance is applied when the probe needle touches the circuit. As a result, the voltage waveform is ruffled so that it is impossible to accurately monitor (measure) the waveform.
In addition, it is necessary that a hole is made on the substrate in order to directly make the probe needle into contact with the LSI internal circuit.
[Patent Document] Japanese Patent Application Laid-open No. 2001-53231